João M. P. Cardoso

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[Special-Purpose Computing Systems, Languages and Tools]






Name: João Manuel Paiva Cardoso

Position: Associate Professor

Department of Informatics Engineering (DEI), Faculty of Engineering,

University of Porto,

Porto, Portugal

Office: I337


Skype: jmcardo

Phone: +351 916629046


Faculdade de Engenharia da Universidade do Porto (FEUP)

Rua Dr. Roberto Frias

4200-465 Porto





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João M. P. Cardoso, and Pedro C. Diniz, Compilation Techniques for Reconfigurable Architectures, Springer, 234 p., October 2008, ISBN 978-0-387-09670-4.


João M. P. Cardoso, Pedro Diniz, José Gabriel Coutinho, Zlatko Petrov (eds.), Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach, Springer, 2013. ISBN 978-1-4614-4894-5

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João M. P. Cardoso, and Michael Huebner (eds.), Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, 311 p., Springer; 1st Edition (Sept. 2011), ISBN-10: 1461400600, ISBN-13: 978-1461400608.




CURRENT RESEARCH PROJECTS: AutoSeer (FCT project), RL8 (FCT project)


18th IEEE International Conference on Computational Science and Engineering (CSE-2015), Porto, Portugal on October 21-23, 2015,

13th IEEE/IFIP International Conferences on Embedded and Ubiquitous Computing (EUC-2015), Porto, Portugal on October 21-23, 2015.

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Member of HiPEAC (European Network of Excellence on High Performance and Embedded Architecture and Compilation).

Current Professional Activities: (TBD)

Recent Professional Activities:

-    Program Co-Chair of RAW’2010, April 19-20, 2010, Atlanta, USA

-    Track Co-Chair of FPL2010, Milano, Italy, Aug. 31 - Sept. 2, 2010

-    Track Program Co-Chair of ReConFig’2010, December 6-8, 2010, Cancun, Mexico

-    Program Committees: SAMOS XI, FPT2010, FPL2010, ARC2011, ACM-SAC-EMBS2010, DIPES2010, ARCS2010,WCAE2009,SPL’2010.ICT2010 (rec. track), REC2010

Recent Teaching Activities:

-    Theory of Computation (MIEIC, 2nd year, 1st semester)

-    Compilers (MIEIC, 3rd year, 2nd semester)

Short Biography:

I have been, since September 4th 2008, Associate Professor in the Department of Informatics Engineering (DEI), Faculty of Engineering, University of Porto, Porto, Portugal.

Before, I was Assistant Professor in the Department of Computer Science and Engineering, Instituto Superior Técnico (IST), Technical University of Lisbon (UTL), in Lisbon (April 4, 2006- Sept. 3, 2008), and Assistant Professor (2001-2006) in the Department of Electronics and Informatics Engineering (DEEI), Faculty of Sciences and Technology, at the University of Algarve, and Teaching Assistant in the same university (1993-2001). I have been a senior researcher at INESC-ID (Systems and Computer Engineering Institute) in Lisbon. I was member of INESC-ID from 1994 to 2009.

I received a PhD and an MSc degree in Electrical and Computer Engineering both from the IST in 2001 and 1997, respectively, and a 5-year engineering degree in Electronic and Telecommunications from the University of Aveiro in 1993.

I worked during one year (2001-2002) for PACT XPP Technologies, Inc., Munich, Germany. There I participated in the research and development of the C compiler (XPP-VC) for the eXtreme Processing Platform (XPP), a coarse-grained reconfigurable computing architecture.

I am a member of the steering committee of the International Workshop on Applied Reconfigurable Computing (ARC). During recent years, I was general co-chair of ARC 2006, held in Delft, The Netherlands, March 1-3, 2006; program chair of ARC 2005, held in Algarve, Portugal, February 22-23, 2005; and general co-chair of the Jornadas sobre Sistemas Reconfiguráveis (REC 2005), a scientific meeting to discuss reconfigurable systems among Portuguese researchers. I was topic co-chair for “Design Methods and Tools” of FPL’2008, co-chair of the PhD forum of FPL’2007, and Exhibition/Sponsorship Chair of FPL’2003. I have been serving on various International Conferences as a Program Committee member and as a reviewer.

My research interests include: Compiler Techniques, Reconfigurable Computing Platforms and Tools, and Design Automation for Embedded Systems.

I am a Member of the IEEE, IEEE Computer Society and a Senior Member of ACM.

Selected Five Publications Complete List:

·         Yiannis Sourdis, João Bispo, João M. P. Cardoso, and Stamatis Vassiliadis, “Regular Expression Matching in Reconfigurable Hardware,” in The Journal of VLSI Signal Processing Systems, Springer, Volume 51, Number 1, April, 2008, pp. 99-121.

·         João M. P. Cardoso, Pedro Diniz, and Markus Weinhardt, Compiling for Reconfigurable Computing: A Survey, ACM Computing Surveys (CSUR), Vol. 42, No. 4, Article 13, June 2010, pp. 1-65..

·         João M. P. Cardoso, and Horácio C. Neto, “Compilation for FPGA-Based Reconfigurable Hardware,” in IEEE Design & Test of Computers Magazine, March/April, 2003, vol. 20, no. 2, pp. 65-75.

·         João M. P. Cardoso, “On Combining Temporal Partitioning and Sharing of Functional Units in Compilation for Reconfigurable Architectures,” in IEEE Transactions on Computers, Vol. 52, No. 10, pp. 1362-1375.

·         João M. P. Cardoso, and Horácio C. Neto, "Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System," In Proc. 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'99), Napa Valley, California, USA, April 21 - 23, 1999, Kenneth L. Pocek and Jeffrey M. Arnold, Editors, IEEE Computer Society Press, Los Alamitos, CA, USA, pp. 2-11.

Research Interests:

-    Reconfigurable Computing, Field-Programmable Custom Computing Machines (FCCMs)

o    Computing Machines, new Architectures, and Mapping Methods

o    Compilation Techniques and Code Optimization

-    Automation of Software and Hardware Engineering Tasks

o    Also applied to Embedded Systems design

-    High-Performance Embedded Computing

o    Compilation Techniques and Code Optimization

o    Hardware Accelerators

-    Domain-Specific Languages (DSLs), Tools and Compilers

Recent Talks:

-    Compilation for Embedded Reconfigurable Computing Architectures, 3rd Summer School on Generative and Transformational Techniques in Software Engineering (GTTSE’2009), 6–11 July, 2009, Braga, Portugal.

-    Reconfigurable Computing: Challenges, Session: Computing in the Nanoera, High Level Conference on Nanotechnologies, an EU2007.PT Event, Braga, Portugal, November 20-21, 2007.

-    A Data-Driven Approach for Pipelining Sequences of Data-Dependent LOOPs, ITIV, University of Karlsruhe, July 2, 2007.

Recent Conferences:

International Conference on Field Programmable Logic and Applications (FPL’2013), Sept. 2-4, 2013, Porto, Portugal,

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International Symposium on Applied Reconfigurable Computing (ARC), [ARC’2014, Algarve, Portugal, April 14-16, 2013]

[Last update on March, 2015]