DCIS'98:

Since the JTAG 1149.1 infrastructure is becoming a common requirement, and IC fabs are providing straightforward solutions to get reliable scan cells at very small cost, designers are starting to consider the usage of BST for on-line operations. This standard test infrastructure is present in most VLSI designs and has the potential to help new ASICs and future PLDs to get a dependable behaviour in Fault-Tolerant applications, at the really feasible and acceptable cost of duplicating the mission logic.