small-size-tfAllScale: Enriching modern C++ for the efficient development of HPC applications
By Thomas Fahringer, Institute of Computer Science, University of Innsbruck, Austria

Abstract:

The tremendous challenge of developing applications efficiently, utilizing the hardware provided by contemporary parallel systems of all scales is among the most limiting factors for the continuous growth of high-performance computing. In this talk, we present a novel architecture taking on this challenge by providing an infrastructure for the effective development of such applications. Our design combines the expressive power of modern C++, advanced compiler technology, and sophisticated runtime system solutions, with the goal of providing a clean separation of domain specific algorithms, resource management activities, and low-level hardware interactions. The talk covers the architecture design, its key aspects, and a preliminary evaluation of the achievable performance of an application implemented based on the proposed infrastructure.

Short Bio:

Thomas Fahringer is a Professor of Computer Science at the University of Innsbruck. He is leading a research group in the area of distributed and parallel processing which develops the ASKALON system to support researchers worldwide in various fields of science and engineering to develop, analyse, optimize and run parallel and distributed scientific applications. Furthermore, he leads a research team that created the Insieme parallelizing and optimizing compiler for heterogeneous multicore parallel computers.

Fahringer was involved in numerous national and international research projects including 10 EU funded projects. He currently coordinates two H2020 projects which includes AllScale - an exascale programming, multi-objective optimization and resilience management environment based on nested recursive parallelism, 2015 - 2018, and the ENTICE project - Decentralized repositories for transparent and efficient virtual machine operations, 2015 - 2018. Fahringer has published 5 books, 35 journal and magazine articles and more than 200 reviewed conference papers including 4 best/distinguished IEEE/ACM papers.

email: tf@dps.uibk.ac.at

URL: http://www.dps.uibk.ac.at

 

_MG_0520The ANTAREX HPC Approach to Help Developers on Program Analysis, Parallelization and Runtime Autotuning

By João MP Cardoso, Faculty of Engineering, University of Porto, Porto, Portugal

Abstract:

Developing and optimizing applications for HPC systems and considering energy-efficiency is an extremely challenging problem. They are difficult and complex tasks that require mastering programming languages, tools for performance tuning, and the target HPC systems. In the ANTAREX project, a DSL-based approach allows developers to apply strategies (recipes) to applications regarding extra-functional requirements, such as performance and energy-efficiency. We provide a holistic and versatile approach spanning various decision layers composing the supercomputer software stack and with the advantage to exploit effectively system capabilities. In this talk, we present the ANTAREX toolflow to enable the definition of energy-efficiency, performance, and adaptivity strategies as well as their enforcement at runtime through application autotuning. We show how the ANTAREX toolflow can effectively assist various development/ optimization stages, including application analysis and profiling, code transformations and parallelization, and integration of runtime autotuning.

Short Bio:

João M. P. Cardoso got his PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 2001. He is Full Professor at the Dep. of Informatics Eng., Faculty of Eng. of the University of Porto, Porto, Portugal, and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany.  He has been involved in the organization and served as a Program Committee member for many Int’l Conferences. He was General Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of ARCS’2016, DASIP’2014, and RAW’2010. He is co-author of two books (Elsevier and Springer), co-editor of two Springer Books and four Springer LNCS volumes. He has (co-)authored over 200 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He has participated in a number of international research projects, e.g., as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), and as coordinator of a number of national funded projects. He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM.  His research interests include compilation techniques, domain-specific languages, reconfigurable computing, high-level synthesis and application-specific architectures, and high-performance computing with a particular emphasis in embedded computing.

 

READEX: Runtime Exploitation of Application Dynamism for Energy-efficient eXascale computing

by Umbreen Sabir Mian, Technical University Dresden (TUD), Dresden, Germany

Abstract:

The goal of the READEX project is to improve energy-efficiency of applications in the field of High-Performance Computing. The project brings together European experts from different ends of the computing spectrum to develop a tools-aided methodology for dynamic auto-tuning, allowing users to automatically exploit the dynamic behaviour of their applications by adjusting the system to the actual resource requirements.

In our talk, we will present the latest advances and developments of the project.

Short Bio:

Umbreen Sabir Mian is a doctoral researcher at Technical University Dresden (TUD) where she is working on a project which focuses on dynamic energy efficiency tuning for exascale computing. Her area of research includes HPC performance analysis and energy efficiency tuning for HPC applications. She received her Bachelors and Masters in Computer Engineering from University of Engineering and Technology, Taxila (UETT).  After serving for three years at UETT as lecturer, she moved to Munich to pursue her research career. She did her Masters in Computer Science from Technical University Munich with specialization in Computer Architecture and HPC

 

http://www.eurompi2016.ed.ac.uk/sites/default/files/images/TomAshby_0.jpgThe ExCAPE Project: Machine Learning on HPC

by Thomas Ashby, IMEC, Belgium, and Jan Martinovic, IT4Innovations, Czech Republic

Abstract:

The partners in the ExCAPE project are developing algorithms for large scale machine learning, studying how those algorithms interact with HPC machines, developing supporting software, and running tests with the prototypes. The use-case driving the technical work is the building of multi-task machine learning models to predict compound-target activity for small molecule bioassays used in pharmaceutical drug discovery. In this talk we will give a summary of the main work and results produced so far in the project, and a more detailed overview of the software prototypes produced with the aim of fostering interactions with HPC researchers outside of the project. We will also touch on other use-cases for machine learning at scale.

Short Bios:

Dr. Ashby received his PhD from the University of Edinburgh (UK) on computational and computer science, focusing on the programmability and performance of computational solvers for scientific computing, incorporating algorithmic analysis, use of high level languages and compiler optimisations. After a brief stint doing computer architecture, he joined Imec, Leuven, Belgium in 2007 and has worked on embedded systems, parallel programming tools, HPC and machine learning. His research interests include numerical algorithms, software engineering for computational problems, computer system architecture and tools, and performance engineering.

Dr. Jan Martinovic is currently Head of Advanced Data Analysis and Simulations Lab at IT4Innovations National Supercomputing Centre of the Czech Republic, located at the VSB - Technical University of Ostrava. His research is focused on large scale data processing and analysis as well as on data based simulations with diverse real-life applications. Those applications comprise support for management and decision-making in emergency situations, intelligent navigation and traffic prediction, flood modelling, smart cities and information retrieval. It also includes research work on HyperLoom which is a platform for defining and executing workflow pipelines in large-scale distributed environments (http://HyperLoom.eu). His activities also cover a development of High-End Application Execution Middleware which allows using HPC infrastructure remotely by specific API (http://HEAppE.eu).