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Short Biography

Ali received his Ph.D. degree in Informatics Engineering from Faculty of Engineering of the University of Porto ( FEUP), Portugal, in 2016, under the supervision of Professor João M. P. Cardoso. Prior to that, he received his B.Eng and Master degree in computer engineering both from the IAU, Iran in 2002 and 2007, respectively. In 2010, he became a researcher at INESC TEC Porto and he involved in European and portuguese national projects during 2010 to 2011. Ali visited Karlsruhe Institute of Technology (KIT) twice during his Ph.D, and he worked in the group of Professor Juergen Becker at Institute for Information Processing Technology (ITIV), Karlsruhe, Germany. Before joining to FEUP, he also worked for three years as a lecturer at the faculty of Computer Engineering, Payame Noor University (PNU). Ali's research interests include Parallel Computing, Multicore and Many-core Architectures (CPU, GPU, FPGA), Field-Programmable Custom Computing Machines (FCCMs), Reconfigurable Computing and Embedded System Design. He is a HiPEAC member since 2010.



  • Ali Azarian, João M. P. Cardoso, "Pipelining Data-Dependent Tasks in FPGA-based Multicore Architectures", in Elsevier Journal of Microprocessors and Microsystems Embedded Hardware Design (MICPRO), Feb 2016. (Link).


  • Ali Azarian, João M. P. Cardoso, "Reducing Misses to External Memory Accesses in Task-Level Pipelining, in IEEE International Symposium on Circuits and Systems (ISCAS'15), pp. 1422-1425, Lisbon, Portugal, 2015. (Link).


  • Ali Azarian, João M. P. Cardoso, "Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-based Multicore Architectures", in 3th Workshop on On-chip memory hierarchies and interconnects: organization, management and implementation (OMHI 2014), workshop co-located with the 20th International Conference of Parallel Processing (Euro-Par 2014), pp. 266-278, Springer LNCS 8806, 2014. (Link).

  • Ali Azarian, João M. P. Cardoso,"An FPGA-based Fine-grained Data Synchronization for Pipelining Computing Stages", In X Jornadas sobre Sistemas Reconfiguráveis (REC 2014), pp. 57-60, Vilamoura, Portugal, April, 2014. (PDF).


  • Ali Azarian, João M. P. Cardoso, Stephan Werner, Jürgen Becker,"An FPGA-based Multi-Core Approach for Pipelining Computing Stages", In 28th Symposium On Applied Computing (ACM SAC 2013), pp. 1533-1540, Coimbra, Portugal, March 18-22, 2013. (PDF).

  • Ali Azarian, "Pipelining Computing Stages in Configurable Multicore Architectures", In 23th International Conference on Field Programmable Logic and Applications (FPL'13), pp. 2-4, Porto, Portugal, 2013. (Link).


  • Ali Azarian, João Canas Ferreira, Stephan Werner, Zlatko Petrov, João M. P. Cardoso, Michael Huebner,"Analysis of Error Detection Schemes: Toolchain Support and Hardware/Software Implications", In NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012), pp. 62-69, Nuremberg, Germany, June 25-28, 2012. (PDF).


  • Ali Azarian, João M. P. Cardoso,"Pipelining Producer-Consumer Tasks using Custom Multi-Core Architectures", In Proceedings of the 7th International Summer School on Ad- vanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2011), 10-16 July, 2011, Fiuggi, Italy, [Poster Abstracts].


  • Ali Azarian, Mahmood Ahmadi,"Reconfigurable Computing Architecture: a Survey and Introduction", In 2nd IEEE International Conference on Computer Science and Information Technology (ICCSIT 2009). Vol.03, pp. 269-274, Aug 2009, Beijing, China (PDF).


  • Ali Azarian, Shohreh Kasaei,"Detection of Singular Points and Classification of Fingerprint Images Using Directional Image", In National Computer Conference, NCC-2002, pp. 451–461, Dec 2002, Ferdowsi University, Iran. (in Persian).

Academic Projects

REFLECTMarch 2011 - Dec 2011

Rendering FPAGs for Multi-Core Embedded Computing, Funded under FP7-ICT (Link)

To develop an approach and a tool-chain to improve productivity by accelerating development cycles of reconfigurable systems by more than two orders of magnitude.

COBAYA April 2010 - March 2011

Closing The Compilation gap Between Algorithms and Coarse-Grained Re- configurable Array Architectures (Link).

Funded by: Fundação para a Ciência e a Tecnologia (FCT), PTDC/EEA-ELC/70272/2006

DDFCS Feb 2001 - June 2002

Design and Development of a Fingerprint Classification System using directional fingerprint images (Link).

Sharif University of Technology, Tehran, Iran

Workshops and Posters

REFLECT and 2PARMA Fall 2012 SchoolOct 2012

Programming Paradigms for Multicore Embedded Systems. Freudenstadt, Germany.

7th International HiPEAC Conference23th to 25th January 2012

Paris, France.

HiPEAC ACACES 201110th to 16th July 2011

Seventh International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy.


Programming GPUs with CUDAOct 2015

organized by NVIDIA and given by Prof. Manuel Ujaldon, within the Technical Program of the IEEE conferences EUC’15 and CSE’15, Porto, Portugal.

Advanced Embedded System Design using VivadoSeptember 2013

Xilinx Workshop, University of Porto, Portugal.

REFLECT and 2PARMA Fall 2012 SchoolOct 2012

Programming Paradigms for Multicore Embedded Systems. Freudenstadt, Germany.

Embedded Linux on MicroBlazeOct 2011

University of Porto, Porto, Portugal.

Many-Core and CUDA ProgrammingJuly 2011

University of Minho, Braga, Portugal.


HiPEACSince 2010 - Present

European Network of Excellence on High Performance and Embedded Architecture and Compilation (Link).

SPeCS Group Since 2010 - Present

Special-Purpose Computing Systems, Languages and Tools (Link).

INESC-PortoSince 2011 - Present

Instituto de Engenharia de Sistemas e Computadores do Porto (Link).

IEEEsince 2012 - Present

Student member

ACMsince 2013 - Present

Student member

Academic Visits

Karlsruhe Institute of Technology (KIT) Sep 2012 - Feb 2013 and May 2011 - July 2011

Institute for Information Processing Technology (ITIV), Karlsruhe, Germany. Working in the group of Prof. Jürgen Becker.

Teaching Experiences

Payame Noor University, Shushtar, Iran 2008 - 2010

Computer Architecture

Digital Circuit Design

Azad University of Shushtar, Iran2007 - 2008

Advanced Programming

Industrial Experiments

Debel Sugar and Cane Factory (Link)Sep 2005 - Sep 2008 (part-time)

Designer, programmer and maintenance of Siemens and Allen Bradley PLCs, Ahwaz Iran.

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