Relatório ESPRIT R4.1:

Sumário:
In this first report on subtask 4.1, an introduction is given to the general concepts of testing digital circuits. This testing primarily focuses on volume production. The introduction indicates the need for structural testing during production of digital circuits. The principle of Boundary Scan Test (BST), as described in the JTAG V2.0 document, is studied for its applicability in several areas of testing. Also the hierarchical structures encountered in systems are studied. The principal discussions are relevant for a wide range of digital products but the remainder of this report mainly deals with board level tests.
To be able to use BST, one has to understand the circuitry under test. The possible faults that can occur are therefore modelled in the second chapter, before deriving a strategy that will detect all possible faults. Also the technology dependency that gives problems in fault detection is discussed. Finally, in the last chapter, the actual protocol for testing with full BST is given, starting with testing the on-board BST infrastructure itself. This chapter shows the BST test sequence to be followed and gives an idea about the test times involved.

Índice:

1 – INTRODUCTION

2 – BOARD TESTING WITH JTAG V2.0

PCB testing
    Conventional test methods
    Modern products and testability
    Quality in production
    Towards process control
JTAG applicability for PCB testing
    Components test
    Structural test
    Functional test
Hierarchical structures
    Multiple TAP testing
    Board level self test
Concluding remarks

3 – FAULT MODELLING FOR FULL BST

Manufacturing faults
    Technology dependency
    Completeness of fault detection
The fault model
    About shorts
    About opens
    Remarks on TPG
Example
    Test patterns
    Diagnosis
    Multiple fault diagnosis

4 – TEST PROTOCOL FOR FULL BST

Test considerations
Remarks on net definition and modelling
Testing the BST infrastructure
    Extended reset
    Check of the BST daisy chain
    Shifting through the BYPASS register
    Example 1: Check using BYPASS registers
    Shifting through the INSTRUCTION register
    Example 2: Check using INSTRUCTION registers
    Check available IDENTIFICATION registers
Testing interconnects
    Board topology
    Conversion after TPG
    Diagnostics
    Test sequence

5 – CONCLUSIONS

6 – PROJECT STATUS AND PROGRESS

REFERENCES